Low voltage CMOS op-amps for a supply close to a transistor's threshold voltage.

被引:0
|
作者
Ramirez-Angulo, J [1 ]
Carvajal, RG [1 ]
Tombs, J [1 ]
Torralba, A [1 ]
机构
[1] Univ Sevilla, Escuela Super Ingn, Dpto Ing Elect, Seville, Spain
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Two schemes for low-voltage CMOS op-amp operation with large input signal swing and constant gm are presented. One of the schemes is based on the use of capacitive dividers with multiple-input floating-gate transistors and the second on a novel concept denoted dynamic battery biasing that uses a battery to keep the op-amp input terminals close to one of the supply rails. Simulations are presented that verify the schemes operating with a 1.2V single supply, IV input output swing and 38 MHz op-amp gain-bandwidth product, 130uW power dissipation with a 10pF load while using 300x300 mu m(2) silicon area. These results are obtained for 0.85V transistor's threshold voltages. Experimental results are shown that verify the correct functionality of both approaches.
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页码:408 / 411
页数:4
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