Impact of Low-Temperature Coolcube™ Process on the Performance of FDSOI Tunnel FETs

被引：0
|
作者：
Diaz-Llorente, C. [1 ]
Colinge, J. -P. [1 ]
Le Royer, C. [1 ]
Vinet, M. [1 ]
Theodorou, C. G. [2 ]
Cristoloveanu, S. [2 ]
Ghibaudo, G. [2 ]
机构：
[1] Univ Grenoble Alpes, CEA, LETI, Grenoble, France
[2] Univ Grenoble Alpes, INP, Minatec, IMEP,LaHC, Grenoble, France
来源：
2018 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2018年
关键词：
Tunnel FET; TFET; charge pumping; noise measurement; trap-assisted tunneling; TAT; ELECTRICAL NOISE;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Tunnel FETs fabricated using the low-temperature CoolCube (TM) process are compared with devices made with standard high-temperature (HT) technology. Charge pumping (CP) and low-frequency noise (LFN) measurements were performed to evaluate the impact of low-temperature (LT) process on the device performance. LT devices feature a higher density of source/drain junction defects, due to lower thermal budget, causing higher levels of LFN. These defects enhance the trap-assisted tunneling (TAT) current which is further amplified by the more abrupt junctions obtained using LT processing.
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页数：3
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