共 50 条
- [3] An Investigation on The Optimum Termination for On-Chip Transmission Lines [J]. 2021 29TH TELECOMMUNICATIONS FORUM (TELFOR), 2021,
- [4] Optimal interconnect termination for on-chip high speed signaling [J]. 2011 INTERNATIONAL CONFERENCE ON ENERGY AWARE COMPUTING, 2011,
- [5] In-Package Ring Hybrid Coupler With On-chip Termination [J]. IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 271 - 275
- [6] Design guideline for resistive termination of on-chip high-speed interconnects [J]. CICC: PROCEEDINGS OF THE IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2005, : 613 - 616
- [7] Optimal termination of on-chip transmission-lines for high-speed signaling [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2007, E90C (06): : 1267 - 1273
- [8] An Improved Analytical Series Resistance Model for On-Chip Stacked Inductors [J]. 2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2013,