A manufacturable high performance quarter micron CMOS technology using I-line lithography and gate linewidth reduction etch process

被引：3
|
作者：
Thakar, GV [1 ]
McNeil, VM [1 ]
Madan, SK [1 ]
Riemenschneider, BR [1 ]
Rogers, DM [1 ]
McKee, JA [1 ]
Eklund, RH [1 ]
Chapman, RA [1 ]
机构：
[1] TEXAS INSTRUMENTS INC,CTR SEMICOND PROC & DESIGN,DALLAS,TX 75265
来源：
1996 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS | 1996年
关键词：
D O I：
10.1109/VLSIT.1996.507855
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：216 / 217
页数：2
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