Low-power Robust Complementary Polarizer STT-MRAM (CPSTT) for On-chip Caches

被引：0

作者：

Fong, Xuanyao ^{[1
]}

Roy, Kaushik ^{[1
]}

机构：

[1] Purdue Univ, Dept Elect & Comp Engn, W Lafayette, IN 47907 USA

来源：

2013 5TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW) | 2013年

关键词：

Complementary polarizers STT-MRAM; spin-transfer torque MRAM (STT-MRAM); improved dual pillar STT-MRAM; symmetric STT-MRAM write current; true self-reference differential STT-MRAM;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

A spin-transfer torque MRAM with complementary polarizers, suitable for on-chip caches, is proposed in this paper. The average critical current for write in our proposed structure is lower than standard STT-MRAM, improving write-ability and reliability. Our proposed structure also has self-referencing differential read operation having subnanosecond read delay, and lower read disturb torque, improving sensing margin and disturb margin by 20%-60% and 55%-70% over standard STT-MRAM, respectively.

引用

页码：88 / 91

页数：4

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