Analog test bus infrastructure for RF/AMS modules in core-based design

被引：6
|
作者：
Zivkovic, Vladimir A. [1 ]
van der Heyden, Frank [1 ]
Gronthoud, Guido [1 ]
de Jong, Frans [1 ]
机构：
[1] NXP Semicond, Eindhoven, Netherlands
来源：
PROCEEDINGS OF THE 13TH IEEE EUROPEAN TEST SYMPOSIUM: ETS 2008 | 2008年
关键词：
D O I：
10.1109/ETS.2008.18
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This article describes an analog test bits infrastructure as a straightforward approach to grant the accessibility to embedded RF or Analog modules in core-based design. This DfT method increases the testability and provides debug/diagnosis facilities. The standardized analog test bits architecture is suited for an automated test development flow. In addition, the entire infrastructure is to a large extent reusable, through its design independence. This industrially innovative and practical approach has been applied to several products within our company, and two RF chips are chosen to illustrate its benefits.
引用
收藏
页码：27 / 32
页数：6
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