Linearity Analysis of Gate Engineered Dopingless And Junctionless Silicon Nanowire FET

被引:0
|
作者
Singh, Sarabdeep [1 ]
Raman, Ashish [1 ]
Kumar, Naveen [1 ]
Ranjan, Ravi [1 ]
Shekhar, Deep [1 ]
Anand, Sunny [2 ]
机构
[1] Dr BR Ambedkar NIT, ECE Dept, Jalandhar 144011, Punjab, India
[2] Amity Univ, ECE Dept, Noida 201313, India
关键词
Linearity parameters; junclionless (JL); charge plasma (CP); dual material gate (DM);
D O I
10.1109/spin.2019.8711788
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper demonstrate the comparative study of various linearity as well as intermodulation distortion (IMD) parameters for junctionless (JL) and charge plasma (CP) dopingless nanowire FETs with dual material gate (DM). the various parameters considered for analysis includes higher order transconductance coefficients: gm2 (second-order) & gm3 (third-order), second-third order harmonic distortion HD2 &HD3, third order current intercept point (IIP3), third order IMD (IMD3), higher order voltage intercept points (VIP2 & VIP3) etc. The simulation study results reveals that analog parameters namely transconductance gm and transconductance gain factor (TGF) along with cut-off frequency f(T) are better for CP_DM. The other parameters including Cgg, gm3, HD2, HD3, IIP3 and VIP3 for JL_DM shows enhanced performance over CP_DM.
引用
收藏
页码:215 / 219
页数:5
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