A 100MHz-2GHz Wireless Receiver in 40-nm CMOS for Software-Defined Radio

被引：0

作者：

Peng, Y. ^{[1
]}

Liu, Y. ^{[1
]}

Yang, F. ^{[1
]}

Zhang, X. L. ^{[1
]}

Yu, X. P. ^{[2
]}

Lu, Z. H. ^{[2
]}

Lim, W. M. ^{[2
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China

[2] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore

来源：

2011 INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2011年

关键词：

Software-Defined Radio; Receiver; 40nm CMOS; Wideband; Low Noise Amplifier; Front-end; DIGITAL CMOS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Software-defined radio (SDR), one of solutions to realize multi-mode terminal for mobile communication standards, has attracted intensive studies. A wideband wireless receiver is designed in a 40-nm CMOS process for SDR, which can cover the frequency range from 100MHz to 2GHz. The wideband RF front-end includes a low noise amplifier (LNA), a mixer, intermediate frequency amplifier (IF AMP) and a variable gain amplifier (VGA). The focal point of the design lies in the wideband LNA. The wideband inductorless LNA with 1.1-V supply is a two-stage amplifier that can operates from 100MHz to 2GHz. The noise figure (NF) of the LNA is 2.2-2.4 dB while it can achieve gains of 24-12 dB and 0- -12 dB when working under the active mode and passive mode, respectively. The whole system provides a NF of 3.2-3.5 dB with 5.02mw power consumption.

引用

页数：2

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