Electromigration Study for Multi-scale Power/Ground Vias in TSV-based 3D ICs

被引:0
|
作者
Pak, Jiwoo [1 ]
Lim, Sung Kyu [2 ]
Pan, David Z. [1 ]
机构
[1] Univ Texas Austin, Austin, TX 78712 USA
[2] Georgia Inst Technol, Atlanta, GA 30332 USA
基金
美国国家科学基金会;
关键词
RELIABILITY;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Electromigration (EM) in power distribution network (PDN) is a major reliability issue in 3D ICs. While the EM issues of local vias and through-silicon-vias (TSV) have been studied separately, the interplay of TSVs and conventional local vias in 3D ICs has not been well investigated. This co-design is necessary when the die-to-die vertical power delivery is done using both TSVs and local interconnects. In this work, we model EM for PDN of 3D ICs with a focus on multi-scale via structure, i.e., TSVs and local vias used together for vertical power delivery. We study the impact of structure, material, and pre-existing void conditions on EM-related lifetime of our multi-scale via structures. Experimental results demonstrate that our EM modeling can effectively capture the EM reliability of the entire multi-scale via in 3D PDN, which can be hard to achieve by the traditional EM analysis based on the individual local via or TSV.
引用
下载
收藏
页码:379 / 386
页数:8
相关论文
共 50 条
  • [21] Thermal-aware TSV Repair for Electromigration in 3D ICs
    Wang, Shengcheng
    Tahoori, Mehdi B.
    Chakrabarty, Krishnendu
    PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2016, : 1291 - 1296
  • [22] Novel Adaptive Power Gating Strategy of TSV-Based Multi-Layer 3D IC
    Kim, Seungwon
    Kang, Seokhyung
    Han, Ki Jin
    Kim, Youngmin
    PROCEEDINGS OF THE SIXTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2015), 2015, : 537 - 541
  • [23] Fault Tolerant Techniques for TSV-based Interconnects in 3-D ICs
    Madani, Siroos
    Bayoumi, Magdy
    2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 2577 - 2580
  • [24] Co-optimization of fault tolerance, wirelength and temperature mitigation in TSV-based 3D ICs
    Zhao, Yi
    Khursheed, Saqib
    Al-Hashimi, Bashir M.
    Zhao, Zhiwen
    2016 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2016,
  • [25] Recovery-aware Proactive TSV Repair for Electromigration in 3D ICs
    Wang, Shengcheng
    Zhao, Hongyang
    Tan, Sheldon X. -D.
    Tahoori, Mehdi B.
    PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2017, : 220 - 225
  • [26] Multi-Scale Environment For Simulation And Materials Characterization In Stress Management For 3D IC TSV-Based Technologies - Effect Of Stress On The Device Characteristics
    Sukharev, Valeriy
    Zschech, Ehrenfried
    STRESS MANAGEMENT FOR 3D ICS USING THROUGH SILICON VIAS: INTERNATIONAL WORKSHOP ON STRESS MANAGEMENT FOR 3D ICS USING THROUGH SILICON VIAS, 2011, 1378 : 21 - +
  • [27] STA Compatible Backend Design Flow for TSV-based 3-D ICs
    Kalargaris, Harry
    Chen, Yi-Chung
    Pavlidis, Vasilis F.
    PROCEEDINGS OF THE EIGHTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2017, : 186 - +
  • [28] Decoupling Capacitor Stacked Chip (DCSC) in TSV-based 3D-ICs
    Song, Eunseok
    Koo, Kyoungchoul
    Kim, Myunghoi
    Pak, Jun So
    Kim, Joungho
    2011 IEEE 20TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2011, : 235 - 238
  • [29] TSV-Based 3D Integration Fabrication Technologies: An Overview
    Salah, Khaled
    2014 9TH INTERNATIONAL DESIGN & TEST SYMPOSIUM (IDT), 2014, : 253 - 256
  • [30] 3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code
    Zou, Qiaosha
    Niu, Dimin
    Cao, Yan
    Xie, Yuan
    2014 19TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2014, : 762 - 767