Evaluation methodology for current collapse phenomenon of GaN HEMTs

被引：0

作者：

Sugiyama, Toru ^{[1
]}

Oasa, Kohei ^{[1
]}

Saito, Yasunobu ^{[1
]}

Yoshioka, Akira ^{[1
]}

Kikuchi, Takuo ^{[2
]}

Shindome, Aya ^{[3
]}

Ohguro, Tatsuya ^{[1
]}

Hamamoto, Takeshi ^{[1
]}

机构：

[1] Toshiba Elect Devices & Storage Corp, Tokyo, Japan

[2] Toshiba Corp Mfg Engn Ctr, Yokohama, Kanagawa, Japan

[3] Toshiba Co Ltd, Corp Res & Dev Ctr, Tokyo, Japan

来源：

2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2018年

关键词：

Current collapse; Evaluation method; GaN transistors; High electron mobility; Inductance load switching;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Methods of both evaluation and analysis of current collapse (C/C) in GaN HEMTs are discussed. Recently, guidelines to the methods of evaluation of C/C in comparing device characteristics have been required as the increase in on-resistance resulting from C/C depends significantly on stress conditions and the applied method. Therefore, as a guideline, we propose the DC voltage stress and inductance load switching stress for the evaluation.

引用

页数：5

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