Parallelization Strategies for Fast Factorized Backprojection SAR on Embedded Multi-Core Architectures

This paper presents parallelization strategies for the implementation of imaging algorithms for synthetic aperture radar (SAR). Great emphasis is placed on time-domain based algorithms, namely the Global Backprojection Algorithm (GBP) and its accelerated version, the Fast Factorized Backprojection Algorithm (FFBP). Multi-core platforms are selected for implementation as some combine good performance results with moderate power consumption. The implemented algorithms support several types of parallelization, as the stages of the algorithms can be handled sequentially or interleaved. For the GBP algorithm three different data distribution schemes are investigated. For the FFBP algorithm a successive stage calculation method is compared with a combined calculation method. The performance is exemplary evaluated on the low cost/energy, yet powerful multi-core platform Odroid-XU4. All parallelization strategies show an almost linear speed-up with the number of used cores. Even though a specific multi-core platform is investigated, the design decisions are applicable for general multi-core architectures.