共 50 条
- [1] Improving Dependability and Performance of Fully Asynchronous On-chip Networks 17TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS (ASYNC 2011), 2011, : 65 - 76
- [2] ATAC: Improving Performance and Programmability with On-Chip Optical Networks 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 3325 - 3328
- [4] Selective Fault-Masking for Improving Yield and Performance of On-Chip Networks 2021 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN, AND CYBERNETICS (SMC), 2021, : 3336 - 3341
- [5] A Performance Model of Multicast Communication in Wormhole-Routed Networks on-Chip 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-5, 2009, : 2665 - 2672
- [6] Improving Hamiltonian-based Routing Methods for On-chip Networks: A Turn Model Approach 2014 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE), 2014,
- [7] A cost and performance analytical model for large-scale on-chip interconnection networks 1600, Institute of Electrical and Electronics Engineers Inc., United States
- [8] Device Modeling and System Simulation of Nanophotonic on-Chip Networks for Reliability, Power and Performance PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2011, : 735 - 740
- [9] A Cost and Performance Analytical Model for Large-scale On-chip Interconnection Networks 2016 FOURTH INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING (CANDAR), 2016, : 447 - 450