New Technologies for advanced high density 3D packaging by using TSV process

There is no question that 3D integration will be the next generation of packaging. This requires new technologies from ultra thin wafer handling to wafer to wafer bonding with 3D inter substrate connections. TSV is a process in which wafers are thinned, stacked and interconnected to significantly improve electrical performance such as signal transmission, interconnect density, reduced power consumption, form factor and manufacturing costs. [GRAPHICS] The TSV process requires ultra thin wafers with less than 50 mu m to reduce the stack thickness and improve the performance of the IC Device. EVG has developed a solution for temporary bonding of wafers to carriers to be able to run in standard IC Fab's all processes for back grinding, etching, metallization, wafer bonding and solder ball formation.