Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems

被引:12
|
作者
Atienza, D
Mamagkakis, S
Poletti, F
Mendias, JM
Catthoor, F
Benini, L
Soudris, D
机构
[1] Univ Complutense Madrid, DACYA, E-28040 Madrid, Spain
[2] Democritus Univ Thrace, VLSI Design Ctr, GR-67100 Xanthi, Greece
[3] Univ Bologna, DEIS, I-40126 Bologna, Italy
[4] IMEC VZW, B-3001 Louvain, Belgium
[5] Katholieke Univ Leuven, ESAT, Louvain, Belgium
关键词
dynamic memory management; low-power design; system-level prototyping;
D O I
10.1016/j.vlsi.2004.08.003
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In the near future, portable embedded devices must run multimedia and wireless network applications with enormous computational performance (1-40GOPS) requirements at a low energy consumption (0.1-2W). In these applications, the dynamic memory subsystem is currently one of the main sources of power consumption and its inappropriate management can severely affect the performance of the whole system. Within this context, the construction and power evaluation of custom memory managers is one of the most difficult parts for an efficient mapping of such dynamic applications on low-power embedded systems. In this paper, we present a new system-level approach to model complex dynamic memory managers integrating detailed power profiling information. This approach allows to obtain power consumption estimates, memory footprint and memory access values to refine the dynamic memory management of the system in an early stage of the design flow and to easily explore the large search space of memory manager implementations. (c) 2004 Elsevier B.V. All rights reserved.
引用
收藏
页码:113 / 130
页数:18
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