CMOS TECHNOLOGY;
RANDOM DOPANT;
DENSITY;
FINFETS;
DEVICE;
DESIGN;
D O I:
暂无
中图分类号:
TB3 [工程材料学];
学科分类号:
0805 ;
080502 ;
摘要:
We investigate the analog figures-of-merits (FOMs) of inversion-mode and junctionless nanowire transistors regarding to the gate metal work-function variation using 3D TCAD simulations. The junctionless device shows more immunity to work-function variation on analog FOMs compared to the inversion-mode counterpart. The correlation between parameters affects the immunity of variation on analog FOMs. Compared to the inversion-mode devices, the overall variation in JL devices are less with weak correlation between transconductance and the gate capacitance resulting in similar cut-off frequency characteristics.
机构:
POSTECH, Dept Elect Engn, Seoul, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Park, Chan-Hoon
Ko, Myung-Dong
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机构:
POSTECH, Dept Elect Engn, Seoul, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Ko, Myung-Dong
Kim, Ki-Hyun
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机构:
POSTECH, Dept Elect Engn, Seoul, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Kim, Ki-Hyun
Hong, Jae-Ho
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机构:
POSTECH, Dept Elect Engn, Seoul, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Hong, Jae-Ho
Baek, Rock-Hyun
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机构:
SEMATECH, Albany, NY 12203 USAPOSTECH, Dept Elect Engn, Seoul, South Korea
Baek, Rock-Hyun
Yoon, Jun-Sik
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机构:
Dept Creat IT Excellence Engn, Pohang, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Yoon, Jun-Sik
Lee, Jeong-Soo
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h-index: 0
机构:
POSTECH, Dept Elect Engn, Seoul, South Korea
POSTECH, Div IT Convergence Engn, Pohang, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea
Lee, Jeong-Soo
Jeong, Yoon-Ha
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机构:
POSTECH, Dept Elect Engn, Seoul, South Korea
Dept Creat IT Excellence Engn, Pohang, South Korea
POSTECH, Div IT Convergence Engn, Pohang, South KoreaPOSTECH, Dept Elect Engn, Seoul, South Korea