Positive Bias Temperature Instability Degradation of Buried InGaAs Channel n-MOSFETs with InGaP barrier layer and Al2O3 Dielectric

被引：0
|
作者：
Wang, S. K. [1 ,2 ]
Chang, H. [1 ,2 ]
Sun, B. [1 ,2 ]
Gong, Z. [1 ,2 ]
Liu, H. -G. [1 ,2 ]
Ma, L. [3 ]
Li, H. [3 ]
机构：
[1] Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing, Peoples R China
[2] Chinese Acad Sci, Inst Microelect, High Frequency High Voltage Device & Integrated C, Beijing, Peoples R China
[3] Guilin Univ Elect Technol, Guangxi Expt Ctr Informat Sci, Guilin, Peoples R China
来源：
7TH IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2016 | 2016年
关键词：
Interface; PBTI; nMOSFET; Traps; InGaAs;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
PBTI stress induced interface trap density in buried InGaAs channel n-MOSFETs with InGaP barrier layer and Al2O3 dielectric is investigated. DC Id-Vg measurements show both degradations of positive AVg and sub-threshold swing (S) in the sub-threshold region, also show degradation of positive AVg in the on-current region. The Id-Vg degradation is mainly contributed by generation of acceptor-like near interface traps under stress.
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页数：2
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