VERIFICATION OF INITIALIZATION SEQUENCES FOR SEQUENTIAL CIRCUITS BY USING DEPENDENCY MATRIXES

This article suggests and approach to verification of initializing sequences for sequential circuits. Binary method might be considered as providing optimistic results, as ternary - pessimistic ones. This article also explains the difference between these two methods, the differences in results and why this is happening. Using ternary approach might prove useful if validation results for both methods differ greatly. Binary method appears to be more accurate at finding initializing sequences, because of reduction to states space after each of input patterns is used. This is not the case when using ternary logic testing under Verilog. To improve overall reliability of experiment results, dependency matrixes are introduced and used to gain valuable knowledge about the circuit working conditions.