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- [23] Performance of a low power fully-depleted deep submicron SOI technology and its extension to 0.15 mu m 1996 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 1996, : 102 - 103
- [25] Two-dimensional analytical modeling of nanoscale electrically-shallow junction (EJ) fully depleted SOI MOSFET 16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2004, : 376 - 379
- [29] Fully-depleted SOI-MOSFET model for circuit simulation and its application to 1/f noise analysis SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2004, 2004, : 255 - 258
- [30] New threshold voltage model for deep-submicron buried channel MOSFET's Qinghua Daxue Xuebao/Journal of Tsinghua University, 1998, 38 (03): : 24 - 26