A Survey on Mixed Operating Mode/Self Synchronization

被引:0
|
作者
Marathe, Dipak S. [1 ]
机构
[1] AC Patil Coll Engn, Elect & Telecommun Dept, Navi Mumbai 410210, Maharashtra, India
来源
2012 NORCHIP | 2012年
关键词
VLSI; GALS; FPGA; AI;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Mixed Operating Mode (MOM) is a digital hardware system which utilizes the advantages of Synchronous and Asynchronous Sequential circuit. But, an Asynchronous sequential circuit suffers from essential hazard. Earlier there were two design philosophies: by the addition of delay elements to the state output, or by input gate modification. These approaches make the whole design slower. On the other hand, the latter approach is based on the assumption that the gate delays are always higher than any wire delay present in the network, but in VLSI circuits the above assumption may not be true and also GALS (Globally Asynchronous, Locally Synchronous) FPGA model has a major drawback of implementing AI(Asynchronous Interfaces) in FPGA devices. AI design style which is based on asynchronous controllers that provides communication between modules(called ports) subject to essential hazard. Using the concept of MOM results in not only saving the logic but also uses less power and making the whole design faster and more flexible. It also improves the throughput and reducing the latency, by satisfying the essential signal condition, this method is capable of providing robust ports, i.e. essential-hazard-free.
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