共 50 条
- [43] Ternary logic gate and multiplier design based on binary memristor Huazhong Keji Daxue Xuebao (Ziran Kexue Ban)/Journal of Huazhong University of Science and Technology (Natural Science Edition), 2024, 52 (03): : 14 - 19and27
- [44] A Novel CNTFET-Based Ternary Logic Gate Design 2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2009, : 435 - 438
- [45] Combinational circuit design based on quantum-dot cellular automata Int. J. Control Autom., 6 (369-378):
- [46] An Efficient Design Methodology for CNFET based Ternary Logic Circuits PROCEEDINGS OF 2016 IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS), 2016, : 278 - 283
- [47] 2:1 Multiplexer Based Design for Ternary Logic Circuits 2013 IEEE ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS & ELECTRONICS (PRIMEASIA), 2013, : 46 - 51
- [49] Minority gate oriented logic design with quantum-dot cellular automata CELLULAR AUTOMATA, PROCEEDINGS, 2006, 4173 : 646 - 656
- [50] Design of Parity Preserving Combinational circuits using Reversible Gate PROCEEDINGS ON 2016 2ND INTERNATIONAL CONFERENCE ON NEXT GENERATION COMPUTING TECHNOLOGIES (NGCT), 2016, : 631 - 638