A Fully Differential Operational Transconductance Amplifier Under 40 nm Complementary Metal-Oxide-Semiconductor Logic Process

被引:6
|
作者
Ning, Ning [1 ]
Fan, Yang [1 ]
Sui, Zhiling [1 ]
Cao, Yingshuai [1 ]
Wu, Shuangyi [1 ]
Yu, Qi [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Peoples R China
关键词
Low Voltage OTA; 40 nm CMOS Process; Low Sensitivity; Negative Resistance Load;
D O I
10.1166/nnl.2012.1417
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
A fully differential operational transconductance amplifier (OTA) with low-sensitivity negative resistance load (LSNDRL) is proposed under standard 40 nm logic CMOS process. With the optimized low-sensitivity negative resistance load, the gain immunity against process variation is effectively improved. Simulated with a 40 nm logic process model, the OTA shows a gain enhancement of 24 dB and the gain variation is greatly suppressed.
引用
收藏
页码:849 / 853
页数:5
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