DESIGN AND ANALYSIS OF A LOW POWER CONSUMPTION HIGH SPEED FREQUENCY DIVIDER BY 2/3

被引：0

作者：

Murtaza, Cristian ^{[1
]}

Cojan, Radu Adrian ^{[1
]}

机构：

[1] Infineon Technol Romania SCS, Cluj Napoca, Romania

来源：

2010 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), VOLS 1 AND 2 | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the design and performances of two high speed high frequency dividers in a standard 60 nm RF technology. The dividers are part of a wireless receiver using a synthesizer with a reference frequency of 26 MHz and a voltage controlled oscillator with an output frequency of 6 GHz. The input operating frequency range of the dividers is 2-8 GHz. The minimum input voltage range is 250mV peak-to-peak and the power consumption of each divider is less than 0.4mW for a 1.3-V power supply.

引用

页码：449 / 452

页数：4

共 50 条

[41] A HIGH-SPEED, LOW-POWER DIVIDE-BY-4 FREQUENCY-DIVIDER IMPLEMENTED WITH ALINAS/GAINAS HBTS
FARLEY, CW
WANG, KC
CHANG, MF
ASBECK, PM
NUBLING, RB
SHENG, NH
PIERSON, R
SULLIVAN, GJ
IEEE ELECTRON DEVICE LETTERS, 1989, 10 (08) : 377 - 379
[42] A novel low-power high-speed programmable dual modulus divider for PLL-based frequency synthesizer
Sulaiman, MS
Khan, N
2002 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS, 2002, : 77 - 81
[43] Analysis and design of high-speed and low-power CMOS PLAs
Wang, JS
Chang, CR
Yeh, CW
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (08) : 1250 - 1262
[44] Design and Analysis of SEU Hardened Latch for Low Power and High Speed Applications
Kumar, Satheesh S.
Kumaravel, S.
JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS, 2019, 9 (03)
[45] A Hybrid Divide-16 Frequency Divider Design for Low Power Phase Locked Loop Design
Batchu, Supraja
Nirlakalla, Ravi
Talari, Jayachandra Prasad
Surisetty, Venkateswarlu
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON SOFT COMPUTING SYSTEMS, ICSCS 2015, VOL 1, 2016, 397 : 491 - 499
[46] A Low-Power Programmable Dynamic Frequency Divider
Chabloz, Jeremie
Ruffieux, David
Enz, Christian
ESSCIRC 2008: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2008, : 370 - 373
[47] A LOW POWER CHARGE STEERING BASED FREQUENCY DIVIDER
Eleraky, Mohamed S.
El Nozahi, Mohamed
Hegazi, Emad
PROCEEDINGS OF 2020 37TH NATIONAL RADIO SCIENCE CONFERENCE (NRSC), 2020, : 197 - 206
[48] Optimal design of macrocells for low power and high speed
Sancheti, PK
Sapatnekar, SS
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996, 15 (09) : 1160 - 1166
[49] Design and Implementation of High Speed and Low Power Filter
Liu, Hui
Zheng, Wei
JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS, 2024, 19 (11) : 1180 - 1185
[50] Low Power Consumption and Wide Locking Range Triple-Injection-Locked Frequency Divider By Two
Wu, Janne-Wha
Tu, Chih-Ho
Chen, Sheng-Wen
Chen, Chang-Chun
Hsiao, Hsu-Feng
Chang, Da-Chiang
2015 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC), VOLS 1-3, 2015,

← 1 2 3 4 5 →