Simulation of High Bandwidth Package on Package (HBPoP) Warpage and its effect on Thermal Cycling

The rapid development of electronic devices that has occurred in recent years has prompted the demand for greater functionality in consumer electronics, with a particular emphasis on multifunctionality, miniaturization, and weight reduction. These restrictions have rendered the design of microelectronic structures much more complex and challenging, since the semiconductor technology has remained relatively unchanged. Recently, high bandwidth package on package (HBPoP) was introduced as a potential candidate for the processor that can be incorporated into smartphones, tablets, and other consumer electronics. Its key advantage stems from high-bandwidth and high-performance computing. However, as the warpage performance of the package is a key factor in the package assembly, it must be investigated before HBPoP can be adopted in practice. The warpage of package on package (PoP) is induced by the mismatch between the thermal expansion coefficients that arises in the reflow process. Once package warpage occurs, it may cause delamination within the structure, as well as induce package assembly failure. Thus, it is a significant reliability issue. In order to improve the PoP warpage performance, a prediction model is developed as a part of the present study by combing the experimental testing results with simulation results. The main objective is to provide the guidelines for optimizing the PoP structure with the goal of improving the warpage performance.