Measurement of Microbump Thermal Resistance in 3D Chip Stacks

被引：0
|
作者：
Colgan, E. G. [1 ]
Andry, P. [1 ]
Dang, B. [1 ]
Magerlein, J. H. [1 ]
Maria, J. [1 ]
Polastre, R. J. [1 ]
Wakil, J. [2 ]
机构：
[1] IBM TJ Watson Res Ctr, 1101 Kitchawan Rd, Yorktown Hts, NY 10598 USA
[2] IBM Austin, Austin, TX 78758 USA
来源：
2012 28TH ANNUAL IEEE SEMICONDUCTOR THERMAL MEASUREMENT AND MANAGEMENT SYMPOSIUM (SEMI-THERM) | 2012年
关键词：
Microbump; Chip stack; Thermal resistance;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The thermal resistance of Pb-free similar to 25 mu m diameter microbumps with pitches of 50, 71, and 100 mu m has been measured with and without underfill in four high chip stacks. With underfill, the unit thermal resistance values were 8.0, 15.5, and 19.0 C-mm(2)/W for 50, 71, and 100. m pitch microbumps, respectively. The average microbump height was 16.1 microns. For the 50 mu m pitch case, the thermal conduction through the underfill is roughly equal to that of the microbumps alone.
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页码：1 / 7
页数：7
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