共 50 条
- [21] A Simple Double Mapping Based SVPWM Method for Balancing DC-Link Capacitor Voltages of Five-Level Diode-Clamped Converters [J]. APEC 2016 31ST ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, 2016, : 2806 - 2812
- [22] Voltage-balancing strategies for diode-clamped multilevel converters [J]. PESC 04: 2004 IEEE 35TH ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-6, CONFERENCE PROCEEDINGS, 2004, : 3988 - 3993
- [23] A New Diode-Clamped Multilevel Inverter for Capacitor Voltage Balancing [J]. PROGRESS IN ELECTROMAGNETICS RESEARCH M, 2016, 52 : 181 - 190
- [24] DC-link Capacitor Voltage Balancing in Five-level Neutral Point Clamped Inverters using Space Vector Modulation [J]. IECON 2017 - 43RD ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2017, : 1037 - 1042
- [26] A Family of High Step-Up A-Source Inverters with Clamped DC-Link Voltage [J]. 2019 10TH INTERNATIONAL POWER ELECTRONICS, DRIVE SYSTEMS AND TECHNOLOGIES CONFERENCE (PEDSTC), 2019, : 195 - 200
- [28] A simple DC-Link Voltage Balancing Strategy for NPC Three-level Inverters [J]. 2023 25TH EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS, EPE'23 ECCE EUROPE, 2023,