A System-Level Synthesis Approach to Industrial Process Control Design

被引:0
|
作者
Arato, Peter [1 ]
Nagy, Dezso [1 ]
Racz, Gyorgy [1 ]
机构
[1] Budapest Univ Technol & Econ, Dept Control Engn & Informat Technol, Budapest, Hungary
关键词
system-level synthesis; high-level synthesis heterogeneous multiprocessing system; industrial process control;
D O I
10.1109/ines46365.2019.9109446
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Multiprocessing can be considered the most characteristic common property of complex digital systems. Due to the more and more complex tasks to be solved for fulfilling often conflicting requirements (cost, speed, energy and communication efficiency, pipelining, parallelism, the number of component processors, etc.), the so called heterogeneous multiprocessing architectures (HMA) have become unavoidable. The component processors of such systems may be not only general purpose CPUs or cores, but also DSPs, GPUs, FPGAs and other custom hardware. A high degree of similarity can be observed between HMAs and modern distributed industrial process control systems as well. In both HMA design and process control design, existing solutions are often extended and reused intuitively to shorten the design time, even though this does not guarantee advantageous results. These trial and error experiments would result in unnecessarily expensive and redundant system architectures. Therefore, the rapid development in this field has resulted in new and task-oriented system-level synthesis (SLS) methods supporting the designer in finding, optimizing and evaluating the proper HMAs and eliminating the intuitive steps in the synthesis procedure as far as possible. This paper presents an adaptation of an existing SLS method for industrial process control system design. Analyzing, evaluating and comparison of the adapted SLS results are also illustrated on a concrete industrial process control design process as a benchmark.
引用
收藏
页码:53 / 58
页数:6
相关论文
共 50 条
  • [1] Application of a System-Level Synthesis Tool in Industrial Process Control Design
    Arato, Peter
    Nagy, Derso
    Racz, Gyorgy
    [J]. ACTA POLYTECHNICA HUNGARICA, 2019, 16 (09) : 155 - 172
  • [2] The SystemJ approach to system-level design
    Gruian, Flavius
    Roop, Partha
    Salcic, Zoran
    Radojevic, Ivan
    [J]. FOURTH ACM & IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS, 2006, : 149 - +
  • [3] VHDL models supporting a system-level design process: A RASSP approach
    DeBardelaben, JA
    Madisetti, VK
    Gadient, AJ
    [J]. VHDL INTERNATIONAL USERS' FORUM, PROCEEDINGS, 1997, : 183 - 185
  • [4] An evolutionary approach to system-level synthesis
    Teich, J
    Blickle, T
    Thiele, L
    [J]. PROCEEDINGS OF THE FIFTH INTERNATIONAL WORKSHOP ON HARDWARE/SOFTWARE CODESIGN (CODES/CASHE '97), 1997, : 167 - 171
  • [5] A system-level approach to controller synthesis
    Wang, Yuh-Shyang
    Matni, Nikolai
    Doyle, John C.
    [J]. IEEE Transactions on Automatic Control, 2019, 64 (10) : 4079 - 4093
  • [6] A heuristic approach to system-level design problems
    Pulka, A.
    [J]. MIXDES 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS:, 2007, : 189 - 194
  • [7] A hybrid approach for system-level design evaluation
    Viehl, Alexander
    Schwarz, Markus
    Bringmann, Oliver
    Rosenstiel, Wolfgang
    [J]. EMBEDDED SYSTEM DESIGN: TOPICS, TECHNIQUES AND TRENDS, 2007, 231 : 165 - +
  • [8] SYSTEM-LEVEL DESIGN
    BOURBON, B
    [J]. COMPUTER DESIGN, 1990, 29 (23): : 19 - 21
  • [9] A system-level approach for the design of smart sensor interfaces
    Chao, G
    Li, XJ
    Meijer, GCM
    [J]. PROCEEDINGS OF THE IEEE SENSORS 2004, VOLS 1-3, 2004, : 210 - 214
  • [10] System-level design of bacterial cell cycle control
    McAdams, Harley H.
    Shapiro, Lucy
    [J]. FEBS LETTERS, 2009, 583 (24) : 3984 - 3991