Methods for Improving Power and Bandwidth of Power Hardware-in-the-Loop Testbenches

被引:0
|
作者
Garcia-Martinez, Eduardo [1 ]
Sanz-Osorio, Jose F. [2 ]
Munoz-Cruzado-Alba, Jesus [1 ]
Manuel Perie, Juan [1 ]
机构
[1] CIRCE Technol Ctr, Elect Syst Dept SSEE, Zaragoza, Spain
[2] Univ Zaragoza, Inst Univ Invest CIRCE, Zaragoza, Spain
基金
欧盟地平线“2020”;
关键词
Power Hardware-in-the-Loop (PHIL); Digital Real-Time Simulation (DRTS); Power Amplifier (PA); simulation; electrical power systems; SIMULATION;
D O I
10.1109/CPE-POWERENG54966.2022.9880861
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
The integration of renewable energy into the electric grid is increasing the use of complex power grid systems. These systems need to be tested in order to guarantee a reliable and secure operation of the grid. A promising test technique to verify and validate these systems is Power Hardware-in-the-loop (PHIL), which can reproduce the desired working environment as closely as possible to real world conditions. However, the reduced bandwidth of the PHIL testbenches limit the accuracy of the experiments and can cause instability issues that compromise the test. In this paper, a characterization and analysis of the complete closed-loop block diagram of a PHIL test is made. After that, different methods are set forth and described to increase the bandwidth and power of the current PHIL testbenches.
引用
收藏
页数:6
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