Research on Hardware-in-the-loop Simulation of Active Power Filter

被引：0

作者：

Yang Xiao-pin ^{[1
]}

机构：

[1] Wuhan Univ, Sch Elect Engn, Wuhan, Peoples R China

来源：

IEEE PEDG 2010: THE 2ND INTERNATIONAL SYMPOSIUM ON POWER ELECTRONICS FOR DISTRIBUTED GENERATION SYSTEMS | 2010年

关键词：

active power filter; delay; hardware-in-the-loop; off-line simulation; real-time simulation; DESIGN;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In industrial application, the compensating effect of active power filter (APF) is weakened because of many practical problems existed in running environment, even some faults may happen on system. But validating testing can not be done fully before APF committed into power system. In order to study and improve dynamic characteristics of APF, hardware-in-the-loop (HIL) system is built up. Detailed comparison and analysis are made on the problems simulated both in off-line simulation and in HIL, and the reasons which caused them are explored. Harmonic detection, compensation algorithm and compensating effect are also analyzed in different sections and simulated respectively. Therefore the reasons and the factors that influence compensating effects are found, and some methods are taken to improve it. Results indicate that the HIL system is feasible and workable.

引用

页码：171 / 175

页数：5

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