Finite element simulation of thermomechanical stress evolution in Cu/low-k interconnects during manufacturing and subsequent thermal cycling

被引：2

作者：

Chérault, N ^{[1
]}

Besson, J ^{[1
]}

Goldberg, C ^{[1
]}

Casanova, N ^{[1
]}

Berger, MH ^{[1
]}

机构：

[1] Ecole Mines, Ctr Mat PM Fourt, F-91003 Evry, France

来源：

PROCEEDINGS OF ESSDERC 2005: 35TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2005年

关键词：

D O I：

10.1109/ESSDER.2005.1546692

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The integration of low-k interlayer dielectrics in interconnects is associated with an increase in mechanical reliability risks. Thermomechanical stresses must be evaluated to understand the behavior of interconnects. As manufacturing processes can introduce large stresses, a sequential process modeling technique is developed in this study. The constituent materials of the interconnects are described by a single elasto-plastic constitutive equation developed from substrate curvature measurements. Stresses in Cu/low-k lines are also evaluated. A good correlation between finite element modeling and curvature measurements is obtained.

引用

页码：493 / 496

页数：4

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