Reconfiguring Circuits Around Defects in Self-Timed Cellular Automata

For the realization of nanocomputers it will be important to have built-in defect-tolerance, which is the ability to overcome the unreliability caused by defective components. This paper explores defect-tolerance for nanocomputers based on Self-Timed Cellular Automata-an asynchronously timed CA of which the functionality can be expressed through a small number of transition rules. The proposed method assumes that defects are coped with in an initial phase by detecting and isolating them in cellular space from non-defective cells. The phase after this-the main topic of this paper-includes a scheme to efficiently lay out circuits on the cellular space in areas that are not affected by defects. The scheme is self-contained, i.e., it is carried out through the transition rules defined for the CA and does not require external circuitry.