Future of Multiprocessors: Heterogeneous Chip Multiprocessors

被引:0
|
作者
Qayum, Mohammad Abdul [1 ]
Siddique, Nafiul Alam [1 ]
Haque, Mohammad Atiqul [1 ]
Tayeen, Abu Saleh Md. [1 ]
机构
[1] New Mexico State Univ, Klipsch Sch Elect & Comp Engn, Las Cruces, NM 88003 USA
关键词
Heterogeneous CMP; Conjoined Core; Amdahl's law;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
As computer applications are becoming complex, large and versatile; the advent of Chip multiprocessor is ubiquitous. There are numerous researches going on about the core architectures within the chip. Heterogeneous Chip Multiprocessor (CMP) is leading the innovation. Heterogeneous CMP is composed of cores of varying performance, and complexity. It gives better area to performance ratio, high throughput, and higher speed up and mitigates Amdahl's bottleneck to some extent. There are three major issues to Heterogeneous CMP-scheduling applications to different cores, configuration of cores, and Amdahl's law utilization. This paper discusses recent researches of these three issues in details and finally, some recommendations are drawn from the study.
引用
收藏
页码:372 / 376
页数:5
相关论文
共 50 条
  • [31] Adaptive Thread Scheduling in Chip Multiprocessors
    Ismail Akturk
    Ozcan Ozturk
    [J]. International Journal of Parallel Programming, 2019, 47 : 1014 - 1044
  • [32] In-Network Caching for Chip Multiprocessors
    Yanamandra, Aditya
    Irwin, Mary Jane
    Narayanan, Vijaykrishnan
    Kandemir, Mahmut
    Narayanan, Sri Hari Krishna
    [J]. HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, PROCEEDINGS, 2009, 5409 : 373 - 388
  • [33] An Energy-Efficient Reliable Heterogeneous Uncore Architecture for Future 3D Chip-Multiprocessors
    Asad, Arghavan
    Fazeli, Mahdi
    Jahed-Motlagh, Mohammad Reza
    Fathy, Mahmood
    Mohammadi, Farah
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2019, 28 (13)
  • [34] An Application-Aware Heterogeneous Prioritization Framework for NoC based Chip Multiprocessors
    Pimpalkhute, Tejasi
    Pasricha, Sudeep
    [J]. PROCEEDINGS OF THE FIFTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2014), 2015, : 76 - 83
  • [35] Improving Yield and Reliability of Chip Multiprocessors
    Pan, Abhisek
    Khan, Omer
    Kundu, Sandip
    [J]. DATE: 2009 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3, 2009, : 490 - 495
  • [36] Leveraging optical technology in future bus-based chip multiprocessors
    Kirman, Nevin
    Kirman, Meyrem
    Dokania, Rajeev K.
    Martinez, Jose F.
    Apsel, Alyssa B.
    Watkins, Matthew A.
    Albonesi, David H.
    [J]. MICRO-39: PROCEEDINGS OF THE 39TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, 2006, : 492 - +
  • [37] Heterogeneous Interconnect for Low-Power Snoop-Based Chip Multiprocessors
    Shahidi, Narges
    Shafiee, Ali
    Baniasadi, Amirali
    [J]. JOURNAL OF LOW POWER ELECTRONICS, 2012, 8 (05) : 624 - 635
  • [38] Are single-chip multiprocessors in reach?
    Harr
    Gupta
    Olukotun
    Jerraya
    Vissers
    Bolsens
    Bergamaschi
    Keutzer
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 2001, 18 (01): : 82 - 89
  • [39] POSEIDON: A Framework for Application-Specific Network-on-Chip Synthesis for Heterogeneous Chip Multiprocessors
    Kwon, Soohyun
    Pasricha, Sudeep
    Cho, Jeonghun
    [J]. 2011 12TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2011, : 182 - 188
  • [40] Thermal monitoring mechanisms for chip multiprocessors
    Long, Jieyi
    Memik, Seda Ogrenci
    Memik, Gokhan
    Mukherjee, Rajarshi
    [J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2008, 5 (02)