A Binarized Neural Network Approach to Accelerate in-Vehicle Network Intrusion Detection

被引:3
|
作者
Zhang, Linxi [1 ]
Yan, Xuke [2 ]
Ma, Di [1 ]
机构
[1] Univ Michigan, Comp & Informat Sci Dept, Dearborn, MI 48128 USA
[2] Oakland Univ, Dept Comp Sci & Engn, Rochester, MI 48309 USA
来源
IEEE ACCESS | 2022年 / 10卷
关键词
Automotive security; intrusion detection; in-vehicle network; controller area network (CAN); binary neural networks; machine learning; CONTROLLER-AREA-NETWORK; DEEP LEARNING APPROACH;
D O I
10.1109/ACCESS.2022.3208091
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Controller Area Network (CAN) is the de facto standard for in-vehicle networks. However, it is inherently vulnerable to various attacks due to the lack of security features. Intrusion detection systems (IDSs) are considered effective approaches to protect in-vehicle networks. IDSs based on advanced deep learning algorithms have been proposed to achieve higher detection accuracy. However, those systems generally involve high latency, require considerable memory space, and often result in high energy consumption. To accelerate intrusion detection and also reduce memory and energy costs, we propose a new IDS system using Binarized Neural Network (BNN). Compared to full-precision counterparts, BNNs can offer faster detection, smaller memory cost, and lower energy consumption. Moreover, BNNs can be further accelerated by leveraging Field-Programmable Grid Arrays (FPGAs) since BNNs cut down the hardware consumption. The proposed IDS is based on a BNN model that suits CAN traffic messages and takes advantage of sequential features of messages rather than each individual message. We also explore various design choices for BNN, including increasing network width and depth, to improve accuracy as BNNs typically sacrifice accuracy. The performance of our IDS is evaluated with four different real vehicle datasets. Experimental results show that the proposed IDS reduces the detection latency (3 times faster) on the same CPU platform while maintaining acceptable detection rates compared with full-precision models. We also examine the proposed IDS on multiple platforms, and our results show that using FPGA hardware reduces the detection latency dramatically (128 times faster) with lower power consumption compared to an embedded CPU device. Furthermore, we evaluate BNNs with different designs. Results demonstrate that wider or deeper models definitely improve accuracy at the cost of increased latency and model sizes to varying degrees. Applications are recommended to choose the appropriate model design they need depending on available resources they have.
引用
收藏
页码:123505 / 123520
页数:16
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