共 50 条
- [3] Logic circuit design based on MOS-NDR devices and circuits fabricated by CMOS process [J]. Fifth International Workshop on System-on-Chip for Real-Time Applications, Proceedings, 2005, : 392 - 395
- [4] Multiple-valued decoder using MOS-HBT-NDR circuit [J]. ELECTRONICS LETTERS, 2007, 43 (20) : 1092 - 1093
- [5] The dc circuit model of a MOS magnetic sensor [J]. SENSORS AND ACTUATORS A-PHYSICAL, 1997, 58 (02) : 125 - 127
- [7] The design of MOS-NDR-based cellular neural network [J]. 2006 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORK PROCEEDINGS, VOLS 1-10, 2006, : 1033 - +
- [8] Design and analysis of the dynamic frequency divider using the BiCMOS–NDR chaos-based circuit [J]. Analog Integrated Circuits and Signal Processing, 2018, 96 : 9 - 19
- [9] The design of MOS-BJT-NDR-based cellular neural network [J]. SIXTEENTH BIENNIAL UNIVERSITY/GOVERNMENT/INDUSTRY MICROELECTRONICS SYMPOSIUM, PROCEEDINGS, 2006, : 189 - +
- [10] A KNOWLEDGE-BASED AID FOR DC CIRCUIT ANALYSIS [J]. IEEE TRANSACTIONS ON EDUCATION, 1989, 32 (04) : 448 - 453