共 47 条
- [41] Growth and Fabrication of Carbon-Based Three-Dimensional Heterostructure in Through-Silicon Vias (TSVs) for 3D Interconnects [J]. 2017 IEEE 19TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2017,
- [46] Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies [J]. IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 1811 - 1817