Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash

被引:0
|
作者
Liu, Weihua [1 ]
Wu, Fei [1 ]
Zhang, Meng [1 ]
Wang, Yifei [1 ]
Lu, Zhonghai [2 ]
Lu, Xiangfeng [3 ]
Xie, Changsheng [1 ]
机构
[1] Huazhong Univ Sci & Technol, Wuhan, Hubei, Peoples R China
[2] KTH Royal Inst Technol, Stockholm, Sweden
[3] Beijing Memblaze Technol Co Ltd, Beijing, Peoples R China
基金
中国国家自然科学基金;
关键词
3D NAND Flash; Charge Trap; Reliability; Threshold Voltage Shifting;
D O I
10.23919/date.2019.8714941
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
3D charge trap (CT) triple-level cell (TLC) NAND flash gradually becomes a mainstream storage component due to high storage capacity and performance, but introducing a concern about reliability. Fault tolerance and data management schemes are capable of improving reliability. Designing a more efficient solution, however, needs to understand the reliability characteristics of 3D CT TLC NAND flash. To facilitate such understanding, by exploiting a real-world testing platform, we investigate the reliability characteristics including the raw bit error rate (RBER) and the threshold voltage (Vth) shifting features after suffering from variable disturbances. We give analyses of why these characteristics exist in 3D CT TLC NAND flash. We hope these observations can guide the designers to propose high efficient solutions to the reliability problem.
引用
收藏
页码:312 / 315
页数:4
相关论文
共 50 条
  • [41] Microscopic physical origin of charge traps in 3D NAND flash memories
    Nanataki, Fugo
    Iwata, Jun-Ichi
    Chokawa, Kenta
    Araidai, Masaaki
    Oshiyama, Atsushi
    Shiraishi, Kenji
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2023, 62 (SC)
  • [42] Modeling of Lateral Migration Mechanism of Holes in 3D NAND Flash Memory Charge Trap Layer during Retention Operation
    Park, Jaeyeol
    Shin, Hyungcheol
    2019 SILICON NANOELECTRONICS WORKSHOP (SNW), 2019, : 61 - 62
  • [43] Multi-Coding ECC Algorithm Based on 3D Charge Trap NAND Flash Hot Region Cell Prediction
    Jiang, Yiyang
    Wang, Qi
    Li, Qianhui
    Huo, Zongliang
    IEEE COMMUNICATIONS LETTERS, 2020, 24 (02) : 244 - 248
  • [44] 3D NAND Flash Status and Trends
    Heineck, Lars
    Liu, Jin
    2022 14TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW 2022), 2022, : 1 - 4
  • [45] 3D stacked NAND flash memories
    Micheloni, Rino
    Crippa, Luca
    3D Flash Memories, 2016, : 63 - 83
  • [46] Single-Event Upset in 3-D Charge-Trap NAND Flash Memories
    Park, Jounghun
    Han, Jin-Woo
    Yoon, Gilsang
    Go, Donghyun
    Kim, Donghwi
    Kim, Jungsik
    Lee, Jeong-Soo
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (11) : 6089 - 6094
  • [47] Radiation Induced Degradation of Charge-trap (CT) 3D-NAND Flash Memory
    Dong, Haitao
    Sun, Chuanxue
    Du, Zhichao
    Sang, Pengpeng
    Zhan, Xuepeng
    Zheng, Xuesong
    Wang, Qianwen
    Wu, Jixuan
    Chen, Jiezhi
    2024 IEEE INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY, ICICDT 2024, 2024,
  • [48] 3D RRAM DESIGN AND BENCHMARK WITH 3D NAND FLASH
    Chen, Pai-Yu
    Xu, Cong
    Xie, Yuan
    Yu, Shimeng
    2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2014,
  • [49] Investigating 3D NAND Flash Read Disturb Reliability With Extreme Value Analysis
    Zambelli, Cristian
    Crippa, Luca
    Micheloni, Rino
    Olivo, Piero
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2021, 21 (04) : 486 - 493
  • [50] VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash
    Cui, Lanlan
    Wu, Fei
    Liu, Xiaojian
    Zhang, Meng
    Xie, Changsheng
    2019 IEEE 37TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2019), 2019, : 668 - 671