Multilayer perceptron network with integrated training algorithm in FPGA

被引：0
|
作者：
Perez-Garcia, A. N. [1 ]
Tornez-Xavier, G. M. [1 ]
Flores-Nava, L. M. [1 ]
Gomez-Castaneda, F. [1 ]
Moreno-Cadenas, J. A. [1 ]
机构：
[1] CINVESTAV IPN, Dept Elect Engn, Mexico City, DF, Mexico
来源：
2014 11TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING, COMPUTING SCIENCE AND AUTOMATIC CONTROL (CCE) | 2014年
关键词：
Artificial neural network; back propagation; descendent gradient; FPGA;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this manuscript we present the implementation of an artificial neural network type Multilayer Perceptron (ANN-MP or NNMP) in Field-Programmable Gate Arrays (FPGA), including Back-Propagation training method based on descendent gradient. This network has 2 reconfigurable hidden layers, adjustable parameters (epochs and ratio learning) and batch learning. The proposed architecture aims to reduce the number of logical elements to be used, so serial processing is utilized. In order to test the performance of the trained network, a nonlinear function was approximated with satisfactory results.
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页数：6
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