Optimized Scheme for Power-of-Two Coefficient Approximation for Low Power Decimation Filters in Sigma Delta ADCs

被引:2
|
作者
Shahein, Ahmed [1 ]
Becker, Markus [1 ]
Lotze, Niklas [1 ]
Ortmanns, Maurits [1 ]
Manoli, Yiannos [1 ]
机构
[1] Univ Freiburg, Chair Microelect, Dept Microsyst Engn, IMTEK, D-79110 Freiburg, Germany
关键词
D O I
10.1109/MWSCAS.2008.4616917
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A novel method for approximating filter coefficients to signed-power-of-two terms is proposed yielding a significant reduction in complexity and power consumption. A Matlab toolbox named MSD-Toolbox (Multi-Stage Decimation) was developed to design and optimize multi-stage decimation filters. The proposed design methodology was used to design an example decimation filter, which was synthesized in 0.13 mu m CMOS technology. The power consumption of the synthesized structure was analyzed. A reduction in power consumption of about 20% has been achieved for a 3-bit, second order lowpass sigma delta ADC decimation filter stage when compared with the conventional structure. For the well known quadratic polynomial objective function of FIR filters a novel subject constraint and limited signed-power-of-two space has been introduced.
引用
收藏
页码:787 / 790
页数:4
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