Implementation of a digital timing recovery circuit for CDMA applications

被引:0
|
作者
Eltawil, AM [1 ]
Grayver, E [1 ]
Tarighat, A [1 ]
Frigon, JF [1 ]
Abbasfar, AA [1 ]
机构
[1] Univ Calif Irvine, Dept Elect Engn & Comp Sci, Irvine, CA 92697 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper a novel timing tracking circuit for CDMA applications is presented. The circuit utilizes a linear interpolator and a Schmitt quantizer to achieve the optimal tradeoff between design complexity and robustness. System simulations, experimental measurements, gate counts and power consumption issues are presented and analyzed.
引用
收藏
页码:73 / 76
页数:4
相关论文
共 50 条
  • [1] FPGA implementation of digital timing recovery in software radio receiver
    Wu, YC
    Ng, TS
    [J]. 2000 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: ELECTRONIC COMMUNICATION SYSTEMS, 2000, : 703 - 707
  • [2] A new digital signal processing implementation of OFDM timing recovery
    Liao, YC
    Chen, KC
    [J]. 2000 IEEE 51ST VEHICULAR TECHNOLOGY CONFERENCE, PROCEEDINGS, VOLS 1-3, 2000, : 1517 - 1521
  • [3] An improved digital timing recovery circuit for burst-mode communications
    Liu, Changqing
    Guo, Xingbo
    Song, Jian
    Pan, Changyong
    Yang, Zhixing
    [J]. 2006 IEEE INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING, VOLS 1-4, 2006, : 666 - 670
  • [4] Architecture and VLSI implementation of digital symbol timing recovery for DTV receivers
    Huang, H
    [J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1999, 45 (02) : 408 - 416
  • [5] Implementation of Synchronization Algorithms, Carrier Phase Recovery and Symbol Timing Recovery, on a Digital Signal Processor
    Benssalah, M.
    Djeddou, M.
    [J]. ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS,, 2009, : 283 - 286
  • [6] Implementation of Code Synchronization for CDMA Applications using Recursive Digital Matched Filter
    Srisakthi, N.
    Rama, Ch. V.
    Vidya, M.
    [J]. 2014 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP), 2014,
  • [7] CHIP TIMING RECOVERY IN DIGITAL MODEMS FOR CONTINUOUS-PHASE CDMA RADIO-COMMUNICATIONS
    GIANNETTI, F
    LUISE, M
    REGGIANNINI, R
    [J]. IEEE TRANSACTIONS ON COMMUNICATIONS, 1995, 43 (2-4) : 762 - 766
  • [8] Design and implementation of an all-digital timing recovery system for asynchronous communication
    Jaime Valenciano-Rojas, Jose
    Rimolo-Donadio, Renato
    [J]. TECNOLOGIA EN MARCHA, 2015, 28 (02): : 33 - 43
  • [9] A Static Timing Analysis Tool for RSFQ and ERSFQ Superconducting Digital Circuit Applications
    Delport, Johannes A.
    Fourie, Coenrad J.
    [J]. IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2018, 28 (05)
  • [10] A decision-directed symbol timing recovery circuit for ATSC digital TV receivers
    Song, WJ
    Oak, SS
    Lee, JC
    Yoon, KR
    [J]. IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1999, 45 (03) : 538 - 543