Design and implementation of an all-digital timing recovery system for asynchronous communication

被引：0

作者：

Jaime Valenciano-Rojas, Jose ^{[1
]}

Rimolo-Donadio, Renato ^{[2
]}

机构：

[1] Inst Tecnol Costa Rica, Ingn Elect, Cartago, Costa Rica

[2] Inst Tecnol Costa Rica, Escuela Ingn Elect, Cartago, Costa Rica

来源：

TECNOLOGIA EN MARCHA | 2015年 / 28卷 / 02期

关键词：

4-PAM modulation; communication systems; digital signal processing; timing recovery;

D O I：

暂无

中图分类号：

O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];

学科分类号：

07 ; 0710 ; 09 ;

摘要：

This work addresses the design and implementation of a timing recovery unit for a communication system with parallel reception, 4-PAM modulation, raised cosine filtering and a nominal sampling frequency of 1,1 GHz. The design of the building blocks within the system, as well as simulation results and the physical implementation in FPGA are discussed.

引用

页码：33 / 43

页数：11

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