Nano watt power rail-to-rail CMOS amplifier with adaptive biasing circuits for ultralow-power analog LSIs

被引:5
|
作者
Ozaki, Toshihiro [1 ]
Hirose, Tetsuya [1 ]
Tsubaki, Keishi [1 ]
Kuroki, Nobutaka [1 ]
Numa, Masahiro [1 ]
机构
[1] Kobe Univ, Grad Sch Engn, Dept Elect & Elect Engn, Kobe, Hyogo 6578501, Japan
关键词
D O I
10.7567/JJAP.54.04DE13
中图分类号
O59 [应用物理学];
学科分类号
摘要
In this paper, we present a rail-to-rail folded-cascode amplifier (AMP) with adaptive biasing circuits (ABCs). The circuit uses a nano ampere current reference circuit to achieve ultralow-power and ABCs to achieve high-speed operation. The ABCs are based on conventional circuits and modified to be suitable for rail-to-rail operation. The measurement results demonstrated that the AMP with the proposed ABCs can operate with an ultralow-power of 384 nA when the input voltage was 0.9V and achieve high speeds of 0.162V/mu s at the rise time and 0.233V/mu s at the fall time when the input pulse frequency and the amplitude were 10 kHz and 1.5V(pp), respectively. (C) 2015 The Japan Society of Applied Physics
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页数:6
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