Low-power rail-to-rail CMOS linear transconductor

被引:0
|
作者
Popa, C [1 ]
机构
[1] Univ Politehn Bucharest, Fac Elect & Telecommun, Bucharest, Romania
关键词
D O I
10.1109/SMICND.2001.967528
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The linearity of MOS transconductor is only moderate (around 30 to 50dB) because they rely on their square-law model, which is not very accurate (particularly in short-channel processes). In addition, only the difference in output currents is ideally linear, whereas individual currents have significant second-order harmonics. The circuit linearity is affected by the second-order effects such as the short-channel effect and the mobility degradation. In order to obtain an improved linearity of the CMOS transconductor, a crossconexion symmetrical stage is used. The wide range is achieved by using two complementary transconductors in parallel.
引用
收藏
页码:557 / 560
页数:4
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