A high speed VLSI architecture of discrete wavelet transform for MPEG-4

被引：0
|
作者：
Chang, SJ [1 ]
Lee, MH [1 ]
Park, JY [1 ]
机构：
[1] SEONAM UNIV, DEPT ELECT ENGN, NAMWOON 590170, SOUTH KOREA
来源：
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1997年 / 43卷 / 03期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, we present a high speed VLSI architecture of Discrete Wavelet Transform (DWT) for MPEG-4. We found similarities between computation results of each octave. By using the similarities, in the proposed architecture, the input data are separated even and odd, and 2 data are inputted in parallel. This causes faster Discrete Wavelet Transform operation than other architectures. In conventional architectures, N-point DWT is computed in N cycles or 2N cycles. Whereas, in the proposed architecture N-point DWT is computed in N/2 cycles with 100% hardware utilization. Therefore, the proposed architecture can be applied in MPEG-4, image transmission in wireless network and digital signal processing which require high speed processing.
引用
收藏
页码：623 / 627
页数：5
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