Random Telegraph Signal Noise in Advanced High Performance and Memory Devices

被引:0
|
作者
Claeys, C. [1 ,2 ]
de Andrade, M. G. C. [3 ]
Chai, Z. [4 ]
Fang, W. [5 ]
Govoreanu, B. [1 ]
Kaczer, B. [1 ]
Zhang, W. [4 ]
Simoen, E. [1 ,6 ]
机构
[1] Imec, Leuven, Belgium
[2] Katholieke Univ Leuven, EE Dept, Leuven, Belgium
[3] Univ Estadual Paulista, Automat & Integrated Syst, Gasi, Sorocaba, Brazil
[4] Liverpool John Moores Univ, EE Dept, Liverpool L3 3AF, Merseyside, England
[5] Microsyst & Terahertz Res Ctr, Chengdu, Peoples R China
[6] Univ Ghent, Dept Solid State Phys, Ghent, Belgium
关键词
random telegraph signal; time lag plot; ReRAMs; low frequency noise; interface traps; UTBB SOI; oxide traps; INDIVIDUAL INTERFACE; TRAPS; RETENTION; DEFECT;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Random Telegraph Signal noise has been extensively studied for more than 30 years and gained high interest in recent years due to its importance for scaled down technologies. This review will demonstrate the power of RTS for single defect characterization. Present understanding of the device physics and evolutions in RTS characterization are highlighted. Special attention is given to RTS in memory devices such as DRAMS, ReRAM, planar (2D) and vertical (3D) flash.
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页数:6
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