Efficient Cryptography on the RISC-V Architecture

被引：24

作者：

Stoffelen, Ko ^{[1
]}

机构：

[1] Radboud Univ Nijmegen, Digital Secur Grp, Nijmegen, Netherlands

来源：

PROGRESS IN CRYPTOLOGY - LATINCRYPT 2019 | 2019年 / 11774卷

关键词：

RISC-V; AES; ChaCha; Keccak; Arbitrary-precision arithmetic; Software optimization;

D O I：

10.1007/978-3-030-30530-7_16

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

RISC-V is a promising free and open-source instruction set architecture. Most of the instruction set has been standardized and several hardware implementations are commercially available. In this paper we highlight features of RISC-V that are interesting for optimizing implementations of cryptographic primitives. We provide the first optimized assembly implementations of table-based AES, bitsliced AES, ChaCha, and the Keccak-f[1600] permutation for the RV32I instruction set. With respect to public-key cryptography, we study the performance of arbitrary-precision integer arithmetic without a carry flag. We then estimate the improvement that can be gained by several RISC-V extensions. These performance studies also serve to aid design choices for future RISC-V extensions and implementations.

引用

页码：323 / 340

页数：18

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