Radiation Damage in Transistors Fabricated with Lapis Semiconductor 200 nm FD-SOI Technology

被引：0
|
作者：
Glab, S. [1 ]
Arai, Y. [3 ]
Baszczyk, M. [1 ]
Bugiel, Sz. [1 ]
Dasgupta, R. [1 ]
Dorosz, P. [1 ]
Idzik, M. [1 ]
Kapusta, P. [2 ]
Kucewicz, W. [1 ]
Mierzwinska, G. [2 ]
Mik, L. [1 ]
Miyoshi, T. [3 ]
Ptaszkiewicz, M. [2 ]
Rydygier, M. [2 ]
Sapor, M. [1 ]
Swakon, J. [2 ]
Takeda, A. [4 ]
机构：
[1] AGH Univ Sci & Technol, Al A Mickiewicza 30, PL-30059 Krakow, Poland
[2] Inst Nucl Phys PAN, PL-31342 Krakow, Poland
[3] High Energy Accelerator Res Org KEK, Inst Particle & Nucl Studies, Tsukuba, Ibaraki 3050801, Japan
[4] Kyoto Univ, Sakyo Ku, Kyoto 6068502, Japan
来源：
2014 IEEE NUCLEAR SCIENCE SYMPOSIUM AND MEDICAL IMAGING CONFERENCE (NSS/MIC) | 2014年
关键词：
D O I：
暂无
中图分类号：
TL [原子能技术]; O571 [原子核物理学];
学科分类号：
0827 ; 082701 ;
摘要：
The paper presents radiation tolerance of the transistor TEG (TrTEG5) test structure fabricated in 200 nm fully depleted silicon on insulator technology dedicated to production of SOI detectors. The chip was irradiated with 60 Cobalt gamma-ray source to total dose of 1.175 kGy at a rate of 67.8 Gy/h. During irradiation, current-voltage characteristics of seventeen different transistors were measured so as to investigate factors affecting radiation resistance. Transistors' threshold voltage shift and transconductance change as a function of the deposited dose are presented. After irradiation all transistors manifested correct operation and threshold voltage change of around 200 mV fall within the limits of specified technological mismatch.
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页数：3
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