Gate contact resistive random access memory in nano scaled FinFET logic technologies

被引:1
|
作者
Hsu, Meng-Yin [1 ]
Shih, Yi-Hong [1 ]
Chih, Yue-Der [2 ]
Lin, Chrong Jung [1 ]
King, Ya-Chin [1 ]
机构
[1] Natl Tsing Hua Univ, Inst Elect Engn, Microelect Lab, Hsinchu 300, Taiwan
[2] Taiwan Semicond Mfg Co, Design Technol Div, Hsinchu 300, Taiwan
关键词
RRAM; OPERATION;
D O I
10.7567/JJAP.56.04CE05
中图分类号
O59 [应用物理学];
学科分类号
摘要
A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits. (C) 2017 The Japan Society of Applied Physics
引用
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页数:4
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