Design toots for 3D mixed mode placement

被引：0

作者：

Li, ZY ^{[1
]}

Yan, HX ^{[1
]}

Hong, XL ^{[1
]}

Zhou, Q ^{[1
]}

Bian, JN ^{[1
]}

Yang, HH ^{[1
]}

Pitchumani, V ^{[1
]}

机构：

[1] Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China

来源：

2005 6TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, BOOKS 1 AND 2 | 2005年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present a set of design tools for three dimensional (3D) mixed mode placement (MMP). The hierarchical 3D MMP design tool is composed of a hierarchical clustering package, a new 3D floorplanning tool, route planning tool, and 2D global/detailed placement tools. We have analyzed the performance of 3D circuit using these tools. It is shown that total wirelength could be reduced by 25% to 43% compared with traditional 2D design using two to four stacked dies. By incorporating thermal management and analysis, we also investigate the thermal scalability of 3D integration.

引用

页码：796 / 799

页数：4

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