VENICE: A Compact Vector Processor for FPGA Applications

被引：7

作者：

Severance, Aaron ^{[1
]}

Lemieux, Guy ^{[1
]}

机构：

[1] Univ British Columbia, Dept ECE, Vancouver, BC, Canada

来源：

2012 IEEE 20TH ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM) | 2012年

关键词：

vector; SIMD; soft processors; scratchpad memory; FPGA;

D O I：

10.1109/FCCM.2012.55

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

VENICE is a new soft vector processor (SVP) for FPGA applications that is designed for maximum through-put with a small number (1 to 4) of ALUs. By increasing clockspeed and eliminating bottlenecks in ALU utilization, VENICE achieves over 2x better performance-per-logic block than VEGAS, the previous best SVP. VENICE is also simpler to program, as its instructions use standard C pointers into a scratchpad memory rather than vector registers.

引用

页码：245 / 245

页数：1

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