Ultra-low power RFIC design using moderately inverted MOSFETs: An analytical/experimental study

被引:0
|
作者
Shameli, Amin [1 ]
Heydari, Payam [1 ]
机构
[1] Univ Calif Irvine, Dept Elect Engn & Comp Sci, Irvine, CA 92697 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper studies the use of moderately inverted MOS transistors in ultra-low power (ULP) RFIC design. We introduce a new figure of merit for a MOS transistor, i.e., the g(m)f(T)-to-current ratio, (g(m)f(T)/I-D), which accounts for both the unity-gain frequency and current consumption during the optimization process of the transistor's performance. Using this figure of merit while taking into account the velocity saturation of short-channel MOS devices, it is shown both experimentally and analytically that the g(m)f(T)/I-D reaches its maximum value in moderate inversion region. Moreover, we analytically investigate the noise behavior of the MOS transistor during the transition from weak inversion to strong inversion region. The measurement results have been obtained for an NMOS transistor fabricated in Jazz Semiconductor's CMOS 0.18 mu m process.
引用
收藏
页码:521 / +
页数:2
相关论文
共 50 条
  • [41] Design and Implementation of an Ultra-Low Power Energy Harvesting Sensor Network
    Yang, Jung Kyu
    Park, Jun-Seok
    Seong, Yeong Rak
    Oh, Ha-Ryoung
    CONVERGENCE AND HYBRID INFORMATION TECHNOLOGY, 2011, 206 : 429 - 436
  • [42] Design and implementation of an ultra-low power passive UHF RFID tag
    Shen Jinpeng
    Wang Xin'an
    Liu Shan
    Zong Hongqiang
    Huang Jinfeng
    Yang Xin
    Feng Xiaoxing
    Ge Binjie
    JOURNAL OF SEMICONDUCTORS, 2012, 33 (11)
  • [43] Design of an ultra-low power device for aircraft structural health monitoring
    Perelli, Alessandro
    Caione, Carlo
    De Marchi, Luca
    Brunelli, Davide
    Marzani, Alessandro
    Benini, Luca
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 1127 - 1130
  • [44] Novel Glitch Reduction Techniques for Ultra-Low Power Digital Design
    Sun, Weidong
    Choi, Ken
    2013 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2013, : 158 - 161
  • [45] Ultra-Low Power VLSI Circuit Design Demystified and Explained: A Tutorial
    Alioto, Massimo
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (01) : 3 - 29
  • [46] Design of Ultra-low Power CMOS Cells for Temperature Sensors in VLSI
    Nath, V.
    Kumari, Ruchika
    Das, B. N.
    Gupta, R. N.
    Singh, L. K.
    Yadav, K. S.
    Jeong, Taikyeong Ted
    2009 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN ELECTRONIC AND PHOTONIC DEVICES AND SYSTEMS (ELECTRO-2009), 2009, : 116 - +
  • [47] Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power
    Bailey, Andrew
    Al Zahrani, Ahmad
    Fu, Guoyuan
    Di, Jia
    Smith, Scott
    JOURNAL OF LOW POWER ELECTRONICS, 2008, 4 (03) : 337 - 348
  • [48] Design Challenges for VCO based ADCs for Ultra-Low Power Operation
    Narasimman, Neelakantan
    Kim, Tony Tae-Hyoung
    2013 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2013, : 249 - 252
  • [49] Design and implementation of an ultra-low power passive UHF RFID tag
    沈劲鹏
    王新安
    刘珊
    宗洪强
    黄锦锋
    杨欣
    冯晓星
    葛彬杰
    Journal of Semiconductors, 2012, 33 (11) : 115 - 120
  • [50] Design of Ultra-Low Power Pulse-Driven MEMS Oscillator
    Seok, Seonho
    Cristiano, Giorgio
    Jang, Taekwang
    2020 SYMPOSIUM ON DESIGN, TEST, INTEGRATION & PACKAGING OF MEMS AND MOEMS (DTIP), 2020,