A 36Gb/s Adaptive Baud-Rate CDR with CTLE and 1-Tap DFE in 28nm CMOS

被引:0
|
作者
Yoo, Danny [1 ]
Bagherbeik, Mohammad [1 ]
Rahman, Wahid [1 ]
Sheikholeslami, Ali [1 ]
Tamura, Hirotaka [2 ]
Shibasaki, Takayuki [2 ]
机构
[1] Univ Toronto, Toronto, ON, Canada
[2] Fujitsu Labs, Kawasaki, Kanagawa, Japan
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:126 / +
页数:3
相关论文
共 50 条
  • [41] A 10Gb/s 4.1mW 2-IIR+1-Discrete-tap DFE in 28nm-LP CMOS
    Shahramian, Shayan
    Carusone, Anthony Chan
    PROCEEDINGS OF THE 40TH EUROPEAN SOLID-STATE CIRCUIT CONFERENCE (ESSCIRC 2014), 2014, : 439 - 442
  • [42] A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process
    Doi, Yoshiyasu
    Shibasaki, Takayuki
    Danjo, Takumi
    Chaivipas, Win
    Hashida, Takusi
    Miyaoka, Hiroki
    Hoshino, Masanori
    Koyanagi, Yoichi
    Yamamoto, Takuji
    Tsukamoto, Sanroku
    Tamura, Hirotaka
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2013, 48 (12) : 3258 - 3267
  • [43] A 40Gb/s Low Power Transmitter with 2-tap FFE and 40:1 MUX in 28nm CMOS Technology
    He, Wenbin
    Ye, Fan
    Ren, Junyan
    2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2019,
  • [44] A 12.4-mW 4.5-Gb/s Receiver With Majority-Voting 1-Tap Speculative DFE in 0.13-μm CMOS
    Chen, Jikai
    Bashirullah, Rizwan
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2013, 60 (12) : 867 - 871
  • [45] A 6b 1.6GS/s ADC with Redundant Cycle 1-Tap Embedded DFE in 90nm CMOS
    Tabasy, E. Zhian
    Shafik, A.
    Huang, S.
    Yang, N.
    Hoyos, S.
    Palermo, S.
    2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
  • [46] A 0.41 pJ/Bit 10 Gb/s Hybrid 2 IIR and 1 Discrete-Time DFE Tap in 28 nm-LP CMOS
    Shahramian, Shayan
    Carusone, Anthony Chan
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015, 50 (07) : 1722 - 1735
  • [47] A 32 Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver with Adaptive Echo Cancellation in 28nm CMOS
    Fan, Yang-Hang
    Kumar, Ankur
    Iwai, Takayuki
    Roshan-Zamir, Ashkan
    Cai, Shengchang
    Sun, Bo
    Palermo, Samuel
    2019 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2019,
  • [48] Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology
    Han, Jaeduk
    Sutardja, Nicholas
    Lu, Yue
    Alon, Elad
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (12) : 3474 - 3485
  • [49] A 0.5-28Gb/s Wireline Tranceiver with 15-Tap DFE and Fast-Locking Digital CDR in 7nm FinFET
    Im, Jay
    Chen, S.
    Freitas, D.
    Chou, A.
    Zhou, L.
    Zhuang, I
    Cronin, T.
    Mahashin, D.
    Lin, W.
    Chan, K. L.
    Zhao, H.
    Tan, K. H.
    Bekele, A.
    Turker, D.
    Upadhyaya, P.
    Frans, Yohan
    Chang, Ken
    2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, 2018, : 145 - 146
  • [50] A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology
    Bulzacchelli, John F.
    Menolfi, Christian
    Beukema, Troy J.
    Storaska, Daniel W.
    Hertle, Juergen
    Hanson, David R.
    Hsieh, Ping-Hsuan
    Rylov, Sergey V.
    Furrer, Daniel
    Gardellini, Daniele
    Prati, Andrea
    Morf, Thomas
    Sharma, Vivek
    Kelkar, Ram
    Ainspan, Herschel A.
    Kelly, William R.
    Chieco, Leonard R.
    Ritter, Glenn A.
    Sorice, John A.
    Garlett, Jon D.
    Callan, Robert
    Braendli, Matthias
    Buchmann, Peter
    Kossel, Marcel
    Toifl, Thomas
    Friedman, Daniel J.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2012, 47 (12) : 3232 - 3248